| Functional description The AS7C1024A and AS7C31024A are high performance CMOS 1,048,576-bit Static Random Access Memory (SRAM) devices organized as 131,072 words x 8 bits. It is designed for memory applications where fast data access, low power, and simple interfacing are desired. Features • AS7C1024A (5V version) • AS7C31024A (3.3V version) • Industrial and commercial temperatures • Organization: 131,072 words x 8 bits • High speed - 10/12/15/20 ns address access time - 5, 6, 7, 8 ns output enable access time • Low power consumption: ACTIVE - 853 mW (AS7C1024A) / max @ 10 ns - 522 mW (AS7C31024A) / max @ 10 ns • Low power consumption: STANDBY - 55 mW (AS7C1024A) / max CMOS - 36 mW (AS7C31024A) / max CMOS • Latest 6T 0.25u CMOS technology • Easy memory expansion with CE1, CE2, OE inputs • TTL/LVTTL-compatible, three-state I/O • 32-pin JEDEC standard packages - 300 mil SOJ - 400 mil SOJ - 8 × 20mm TSOP 1 - 8 x 13.4mm sTSOP 1 • ESD protection ≥ 2000 volts • Latch-up current ≥ 200 mA |
